This page reports some new results obtained starting from the benchmarks described in:
Razvan Nane, Vlad Mihai Sima, Christian Pilato, Jongsok Choi, Blair Fort, Andrew Canis, Yu Ting Chen, Hsuan Hsiao, Stephen Dean Brown, Fabrizio Ferrandi, Jason Helge Anderson, Koen Bertels.
“A Survey and Evaluation of FPGA High-Level Synthesis Tools”.
IEEE Trans. on CAD of Integrated Circuits and Systems 35(10): 1591-1604 (2016).
They are obtained with bambu v0.9.5 executed on a Intel(R) Xeon(R) CPU E5-2620 v2 @ 2.10GHz with Debian 9 “Stretch”-64bit and using GCC version 4.9.4
Source code of such benchmarks are distributed together with the PandA framework.
VIVADO 2017.2 – Virtex7 HLS study results
QUARTUS II 17.0 – StratixV HLS study results
VIVADO 2017.2 – Virtex7 HLS study results – UNOPT – 400Mhz target frequency
QUARTUS II 17.0 – StratixV HLS study results – UNOPT – 400Mhz target frequency